Semiconductor integrated circuits are the fundamental building block of modern electronic devices. Computers, cellular phones, and consumer electronics rely extensively on these devices which may be used for storage of, computations on, and communication of data.
The most common semiconductor devices are formed using silicon and silicon compounds. Layers and regions of N-type material (such as silicon), P-type material, and insulative material are combined to form electronic devices and circuits. N-type material is material which includes an excess of electrons. A typical method of producing N-type material is the introduction of certain atomic impurities into the semiconductor during growth of the semiconductor. When certain other atomic impurities are introduced during growth, the resulting material will generally be P-type, having "holes", or in other words, a deficit of electrons. In a P-type material, the holes act as charge carriers for flow of electricity. In an N-type material, the excess electrons act as charge carriers. An insulator material is one which has a high resistance to current flow and may be used to isolate discrete components of a circuit, and act as a substrate on which active devices may be grown.
The arrangement of P-type, N-type, and insulative materials and the respective electrical connections to each will determine what type of electrical device is created. Transistors, diodes, capacitors and most other electrical devices are created through the arrangement of these materials in a semiconductor device.
Recently, the advantages of using the Group III-V semiconductors as the primary device building block (semiconductors formed from compound alloys including Group III and Group V elements) has led to extensive research and development. Among the typically used compounds and alloys are indium gallium arsenide (InGaAs), gallium phosphide (GAP), gallium arsenide (GaAs), aluminum gallium arsenide (AlGaAs), indium gallium phosphide (InGaP), indium gallium aluminum phosphide, and indium phosphide (InP). The basic designs for the transistors and other devices used in silicon-based electronic devices have been adapted to Group III-V materials. Devices made from the Group III-V materials generally require lower power and are faster (operate at higher frequencies).
Group III-V semiconductor materials may also be used to produce opto-electronic semiconductor lasers. In such devices an active region of un-doped or low-doped semiconductor material that is sandwiched between dual layers of P-type and N-type doped materials emits coherent light in response to the application of electrical current. The light is produced when holes from the p-type material recombine with electrons from the n-type material in the active region.
Other applications of the Group III-V materials are known to those in the art and include optical detectors, high-speed amplifiers and logic circuits. However, the widespread substitution of these semiconductors for silicon devices is impeded by the relative difficulty and expense in producing a group III-V conductor in comparison to the silicon devices.
One of the problems encountered in the production of these materials relates to the production of N-type group III-V layers. Silicon is widely recognized as the principle dopant vehicle by which N-type group III-V layers are grown. However, typical manners of supplying silicon as a dopant source are inefficient and may produce undesirable side effects.
One example of an undesirable side effect arises from the known technique of using elemental silicon as a dopant. The method is incompatible with the MOMBE growth technique. In this technique, a substrate is placed into a chamber and a silicon block is heated to a given temperature to produce the beam of elemental silicon atoms. This results in the formation of a passivating crust of carbon and SiC on the hot Si surface. This crust greatly reduces doping efficiency since the effective area from which the silicon may be released is reduced.
Other silicon dopant sources may also lead to practical difficulties. Vapor sources of silicon such as SiH.sub.4 and Si.sub.2 H.sub.6 have been investigated as potential dopants for Group III-V materials such as InP and GaAs. The use of SiH.sub.4 to dope GaAs may be inefficient since precracking of the Si--H bonds is required. Precracking is a process by which the SiH.sub.4 is heated to a very high temperature, on the order of 1200.degree. C., in a tube or other space prior to introduction into the reactor chamber including the Group III-V Ga and As precursors. The precracking is necessary because the typical pressures and temperatures used to cause reaction between the Ga and As precursors are too low to crack the Si--H bonds.
Precracking of the SiH.sub.4 is also required to dope other Group III-V materials such as InP and InGaAs. Those materials are typically grown at temperatures even lower than GaAs and precracking is necessary. The additional step of precracking and the high temperatures required to make the SiH.sub.4 silicon dopant process work render the growth process inefficient.
The Si--H bond strengths render use of SiH.sub.4 inefficient, but Si--H bonds are more easily broken in Si.sub.2 H.sub.6. The weaker bonds suggest that cracking should occur more efficiently at the growth temperatures used during group III-V growth techniques. Nonetheless, previous Si.sub.2 H.sub.6 doping of InP has shown only moderate success. Experiments using Si.sub.2 H.sub.6 to dope InP during beam epitaxy growth techniques have obtained a relatively low maximum doping concentration of 1.4.times.10.sup.18 cm.sup.-3. This low concentration limits the ability of Si.sub.2 H.sub.6 to produce highly N-type layers that are useful in many semiconductor devices.
Tin doping has also been investigated as an alternative method to silicon doping for producing N-type group III-V materials. Tin precursors such as Sn(C.sub.2 H.sub.5).sub.4 incorporate at fairly high efficiencies into Group III-V layers. Additionally, the elemental Sn does not form a carbide and problems associated with formation of a crust on the Sn precursor is not a concern. However, other problems arise from the use of Sn as a dopant. Unlike silicon, tin has a tendency to remain reactive during growth of subsequent regions. Thus, after growth of a Sn doped N-type region, subsequently grown regions may be unintentionally doped with Sn. Such unintentional doping impedes efforts at controlling the composition of discrete semi-conductor device regions. That control is essential to the production of useful devices.
The Sn dopant sources also exhibit what is known as a memory effect in the growth reactor system used to grow the Group III-V semiconductor material. Relatively high pressure is necessary to induce the vapor state of the Sn precursor. This relatively high pressure renders the abrupt shut-off of the dopant source difficult and sharp doping profiles are therefore not easily obtained. The effect of a gradual shut off of the dopant source results in what is commonly termed the memory effect in the reactor.
In sum, there is a need for a more efficient method for the controlled silicon doping of group III-V materials to produce N-type regions. It is therefore an object of the invention to provide an improved process for silicon doping of Group III-V materials to produce N-type semiconductor regions, including InP regions.
Another object of the invention is to provide an efficient silicon doping process for selectively producing net electron concentrations in the approximate range of 1.times.10.sup.16 to 1.2.times.10.sup.20 cm.sup.-3 in Group III-V semiconductor regions, including InP regions.
Yet another object of the invention is to provide a process for silicon doping of Group III-V semiconductor material in which a silicon dopant precursor incorporates silicon into the semiconductor at an efficiency in excess of approximately 10.sup.-4.
A further object of the invention is to provide a process for silicon doping of Group III-V semiconductor material in which a silicon dopant precursor supplies silicon which activates electrically in the semiconductor material at a rate approaching 100%.
A still further object of the invention is to provide a process for silicon doping of Group III-V semiconductor material including InP which produces semiconductor regions allowing contact resistances lower than approximately 10.sup.-7 ohm-cm.sup.2.
An additional object of the invention is to provide a process for silicon doping of Group III-V semiconductor material using a silicon dopant precursor of silicon tetrabromide or silicon tetriodide.